Estimate C1 and C2 for a lumped Pierce-oscillator model, the modeled circuit load, and the approximate frequency error from a load mismatch. Check applicability against your crystal and oscillator datasheets.
Crystal Oscillator Load Capacitance Formula
The load capacitance a crystal sees is the series combination of the two external capacitors plus the stray capacitance of the board:
CL = (C1 * C2) / (C1 + C2) + Cs
When the two capacitors are equal, which is the normal design choice, you can solve directly for the value each one needs to be:
C1 = C2 = 2 * (CL - Cs)
If the actual load differs from the load the crystal was calibrated for, the oscillation frequency shifts. The first-order error in parts per million, neglecting higher-order terms, is:
ppm = (Cm / 2) * (1 / (C0 + CLa) - 1 / (C0 + CLr)) * 10^6
Variables:
- CL is the load capacitance the crystal sees in the circuit (pF)
- C1 and C2 are the external load capacitors from each crystal pin to ground (pF)
- Cs is the effective additive stray term for this circuit model (pF). Account for PCB and pin capacitance consistently; do not double-count internal loading.
- CLr is the rated load capacitance from the crystal datasheet (pF) and CLa is the actual load capacitance in your circuit (pF)
- Cm is the motional capacitance of the crystal in pF (datasheets usually list it in fF; 1 fF = 0.001 pF)
- C0 is the shunt capacitance of the crystal (pF)
The calculator uses these three relationships as its three solve modes. The default mode takes the CL rating and your stray capacitance estimate and returns the value both load capacitors should be, along with the nearest E12 and E24 standard capacitor values and the load error each one produces. The second mode works in reverse: enter the capacitors already on your board and it returns the actual load capacitance, with an optional comparison against the datasheet rating. The third mode turns a load mismatch into a frequency error in ppm using Cm and C0, and also reports the trim sensitivity, which is how many ppm the frequency moves per pF of load change at your operating point.
Load Capacitor Selection and Frequency Sensitivity Tables
The first table shows the required value of C1 and C2 for the most common crystal CL ratings at three typical stray capacitance levels. Round the result to the nearest standard capacitor value; the calculator shows how much load error that rounding introduces.
| Crystal CL rating | C1 = C2 at Cs = 3 pF | C1 = C2 at Cs = 4 pF | C1 = C2 at Cs = 5 pF |
|---|---|---|---|
| 6 pF | 6 pF | 4 pF | 2 pF |
| 8 pF | 10 pF | 8 pF | 6 pF |
| 9 pF | 12 pF | 10 pF | 8 pF |
| 10 pF | 14 pF | 12 pF | 10 pF |
| 12 pF | 18 pF | 16 pF | 14 pF |
| 12.5 pF | 19 pF | 17 pF | 15 pF |
| 15 pF | 24 pF | 22 pF | 20 pF |
| 18 pF | 30 pF | 28 pF | 26 pF |
| 20 pF | 34 pF | 32 pF | 30 pF |
The second table gives local sensitivity magnitudes and a linearised estimate for a 1 pF load change. These are not exact finite-change errors; use the mismatch formula for a specified actual load. MHz rows assume Cm = 8 fF and C0 = 3 pF, and 32.768 kHz rows assume Cm = 3 fF and C0 = 1.5 pF; use your part data. Increasing load lowers frequency; the displayed derivative in the calculator is signed.
| Crystal and CL rating | Trim sensitivity | Linearised magnitude for 1 pF | Clock drift from that error |
|---|---|---|---|
| MHz AT-cut, CL = 8 pF | 33.1 ppm/pF | 33.1 ppm | 2.86 s/day |
| MHz AT-cut, CL = 12 pF | 17.8 ppm/pF | 17.8 ppm | 1.54 s/day |
| MHz AT-cut, CL = 18 pF | 9.1 ppm/pF | 9.1 ppm | 0.78 s/day |
| MHz AT-cut, CL = 20 pF | 7.6 ppm/pF | 7.6 ppm | 0.65 s/day |
| 32.768 kHz tuning fork, CL = 6 pF | 26.7 ppm/pF | 26.7 ppm | 2.30 s/day |
| 32.768 kHz tuning fork, CL = 9 pF | 13.6 ppm/pF | 13.6 ppm | 1.18 s/day |
| 32.768 kHz tuning fork, CL = 12.5 pF | 7.7 ppm/pF | 7.7 ppm | 0.66 s/day |
Example Problems
Example 1: Find the load capacitors for a 16 MHz crystal rated for CL = 12 pF on a board with an estimated 4 pF of stray capacitance.
C1 = C2 = 2 * (12 – 4) = 16 pF. Since 16 pF is a standard E24 value, you can hit the rated load exactly: the series pair contributes 8 pF, plus 4 pF of stray, for a 12 pF total.
Example 2: The same crystal (Cm = 8 fF, C0 = 3 pF) is built with 15 pF capacitors from the E12 series instead. How far off is the frequency?
The actual load is (15 * 15) / (15 + 15) + 4 = 11.5 pF. The error is ppm = (0.008 / 2) * (1 / (3 + 11.5) – 1 / (3 + 12)) * 10^6 = +9.2 ppm, so the oscillator runs fast by about 147 Hz at 16 MHz. Whether this meets an application’s requirements depends on its total frequency-error budget, including initial tolerance, temperature, ageing and component variation. This model does not verify startup margin or drive level.
Frequently Asked Questions
What happens if the load capacitors are too large or too small?
A load above the rated CL pulls the oscillation frequency below its calibrated value, and a load below the rating pulls it high. For a small change, the shift is approximately the load error times the local trim sensitivity, so a 2 pF mistake on a crystal with 15 ppm/pF sensitivity gives roughly 30 ppm of error. Oversized capacitors also increase the drive current the amplifier must supply, which can slow startup or, in marginal designs, keep the oscillator from starting at all. Undersized loads reduce stability margin and can make the frequency more sensitive to humidity and layout changes.
How do you estimate stray capacitance without measuring it?
Use the oscillator manufacturer’s model, pin-capacitance data and layout guidance. A per-pin capacitance is not always an additive Cs term; account for the series network and any internal loading consistently. Verify the built board with a suitable measurement method and account for other frequency errors before attributing an offset to load capacitance. A small load correction may be estimated from the local derivative, then rechecked on the board.
Do C1 and C2 have to be equal?
Equal values are the standard choice because they keep the drive symmetric around the amplifier and make the load easy to calculate. The circuit still works with unequal values, and designers occasionally offset one capacitor by a small amount to fine-trim the frequency. If you do use unequal values, the load is the full series formula, not half of either capacitor, and the ratio should stay close to 1 so neither crystal pin sees a disproportionate voltage swing.
